[ryao]

There are an incredible number of companies designing their own RISC-V cores right now. Some of them are even are making some of their designs entirely open source so that they are royalty free. The highest end designs are not, but it is hard to imagine their creators not undercutting ARM’s license fees since that is money that they would not have otherwise.

As for Qualcomm, they won the lawsuit ARM filed against them. Changing from ARM to RISC-V would delay their ambition to take marketshare from Intel and AMD, so they are likely content to continue paying ARM royalties because they have their eyes on a much bigger prize. It also came out during the lawsuit that Qualcomm considers their in-house design team to be saving them billions of dollars in ARM royalty fees, since they only need to pay royalties for the ISA and nothing else when they use their own in-house designs.

[theupsidedown]

I doubt open source designs are going to be competitive with closed source. Also, design is just part of the problem. There is a whole lot of other things you need to get a chip out. I do not think RISC-V chips will be cheaper than other architecture when you take everything into account.

[ryao]

It is funny that you should say that, considering that I was wondering this myself earlier today WRT the Hazard3 cores in the RP2350. It turns out someone did benchmarks:

https://icircuit.net/benchmarking-raspberry-pi-pico-2/3983

The Hazard3 core was designed by a single person while the ARM Cortex cores were presumably designed by a team of people. The Hazard3 cores mostly outperforms the Cortex-M0+ cores in the older RP2040 and are competitive with the Cortex-M33 cores that share the RP2350 silicon. For integer addition and multiplication, they actually outperform the Cortex-M33 cores. Before you point out that they lost most of the benchmarks against the Cortex-M33 cores, let me clarify that the integer addition and multiplication performance matter far more for microcontrollers than the other tests, which is why I consider them to be competitive despite the losses. The Hazard3 cores are open source:

https://github.com/Wren6991/Hazard3

That said, not all RISC-V designs are open source, but some of the open source ones are performance competitive with higher end closed source cores, such as the SonicBoom core from Berkeley:

https://adept.eecs.berkeley.edu/wiki/_media/eop/adept-eop-je...

As for the other problem you cite, the RP2350 has both RISC-V and ARM cores. It is a certainty that if the ARM cores had not been present, the RP2350 would have been cheaper, since less die area would have been needed and ARM license fees would have been avoided.

[fidotron]

RISC-V implementations are going to prove to be absolute patent minefields.

Just because something is open source will not stop you from being stung during manufacturing, rather like how Android deployments are not free.

[ryao]

So far, patent lawsuits have been more of a problem for those using ARM designs (Qualcomm) than those using RISC-V designs. The Raspberry Pi foundation, Western Digital and Nvidia have successfully put RISC-V designs into their products without any issues. The first two even made their core designs open source (see Hazard3 and SweRV).

[fidotron]

How are SiFive going to protect their IP when everyone is free to copy it?

Patents.

[RetroTechie]

You're not free to copy SiFive's IP cores.

Open ISA != all implementations of it are free (although in RISC-V case, many are).

[fidotron]

Sorry, that was poorly worded.

My point is that if RISC-V takes off people will struggle to do decent implementations of it without stepping on the toes of the people already in the area.

I'd go so far as to say this is the entire SiFive strategy.

[ryao]

RISC-V already has taken off. There are billions of RISC-V cores shipped in consumer products every year. Adoption outside of the embedded MCU space is slower, but that is natural. Your FUD about SiFive is absurd. Hardware patents related to CPU design are typically ISA independent.

[ryao]

Anyone is free to make a RISC-V CPU without infringing on SiFive’s IP.

[fidotron]

Which in practice will mean free to make simplistic implementations using the lessons of twenty years ago.

If this was a winning strategy those open source implementations of SuperH cores would have been incredibly popular instead of dying in obscurity.

[ryao]

SuperH is owned by Hitachi. You cannot use them without a license from Hitachi as far as I know. RISC-V is unique in that its creator permits anyone to make and use RISC-V cores royalty free. It also supports 64-bit, which SuperH never did.

In any case, you should probably stop writing before you shove your foot any deeper into your mouth.

[camel-cdr]

Not so simplistic, see the XiangShan HotChips presentation:

https://hc2024.hotchips.org/assets/program/conference/day2/2...