My point is that if RISC-V takes off people will struggle to do decent implementations of it without stepping on the toes of the people already in the area.
I'd go so far as to say this is the entire SiFive strategy.
RISC-V already has taken off. There are billions of RISC-V cores shipped in consumer products every year. Adoption outside of the embedded MCU space is slower, but that is natural. Your FUD about SiFive is absurd. Hardware patents related to CPU design are typically ISA independent.
That has not stopped new CPU designs from being made for any architecture and will not stop RISC-V designs from being made. If this were an actual problem, no one could design CPUs.
> Patents tend to expire at different times around the world, plus there is the possibility of submarine patents. Without a declaration from Hitachi, adopting any processor design using their ISA is likely considered a legal risk.
If you combine this with your observation that CPU patents tend to be ISA independent then surely any widespread commercial deployment of RISC-V requires an assertion from everyone else in the semi industry that they do not in fact own patents on your implementation of it or it is likely considered a legal risk.
That or you just hold some things to different standards than others.
SuperH is owned by Hitachi. You cannot use them without a license from Hitachi as far as I know. RISC-V is unique in that its creator permits anyone to make and use RISC-V cores royalty free. It also supports 64-bit, which SuperH never did.
In any case, you should probably stop writing before you shove your foot any deeper into your mouth.
You should apologize to the people reading your comments for wasting their time. It is clear you are clueless about RISC-V and your foot is well into your mouth.
As for the J2, its creator does not request licensing fees, but Hitachi might require them. Unlike RISC-V, the creator of SuperH (Hitachi) is not known to have declared the ISA to be royalty free. I am not aware of such a declaration and even if there was, it is irrelevant because there is no reason to use SuperH over RISC-V. Nothing about the J2 supports the FUD you are spreading about RISC-V.
> You should apologize to the people reading your comments for wasting their time. It is clear you are clueless about RISC-V and your foot is well into your mouth.
You're absolutely out of line.
> As for the J2, its creator does not request licensing fees, but Hitachi might require them.
"FUD". The whole point of the timing of the release of the J2 was it is based purely on now expired Hitachi patents, so they do not require any licensing fees.
Open ISA != all implementations of it are free (although in RISC-V case, many are).