[jaekwon]

If this were to become a more serious (but still open/free) project, what is the projected speed, in your opinion, that can be achieved by a hobbyist with an FPGA board or similarly available technology, say by the year 2020?

I ask because this seems like one avenue to create a full stack open source/hardware machine whose security can be vetted by the community. I wonder if by 2020 we might be running your core on handsets.

On a related note, I wish I could run a USB stick that runs a ROM-BIOS burned into an FPGA stick. Is that possible today?

[mmagin]

Is there any reason to trust closed-source FPGA synthesis and place and route tools any more than an Intel CPU?

[jaekwon]

I hear of advances in program obfuscation. They're working on improving performance. Whether they are secure or not, I do not know.

But if it is possible to obfuscate a program, I think it should be possible to create something on an FPGA that is secure and private.

[weland]

Sadly, there's more in an FPGA than "just" a dumb lookup table for implementing logic functions. There's not much more reason to trust an FPGA than an Intel CPU.

[drdaeman]

Sounds interesting. I thought most of FPGA is logic blocks, then there's some MCU that would handle loading the design, maybe some ADC and/or DACs, and then there isn't much more than this. The MCU, theoretically, could try to analyze your design and modify it, but that would require either a targeted adversary that knows the design or a good amount of computational power and fancy algorithms to analyze what's going on.

Maybe you have any links with a good further reading on that topic?

[retroencabulato]

The point is there may be an additional, secret, logic block which allows malicious access to the flops.

[drdaeman]

There could be, but mustn't it be aware of schematics FPGA is soldered into? A secret block to just manipulate flops isn't enough - it must be able to be controlled by someone.

Well, in theory it must not, because it could detect "oh, this looks exactly like one of popular Ethernet cores, so I'll bug onto those pins and have networking", but this seems like a hard task. Or, well, it could be that every pin is hooked and a secret block awaits a specifically crafted code (somehow like port knocking), but I'm not sure this is a feasible approach.

[inforichland]

Honestly, I'm still on the new-ish end of FPGA design (a year or so), so I'm probably not qualified to answer the first one, but I'd have to guess probably not much faster? A fully pipelined CPU could theoretically achieve the maximum clock rate that a given FPGA family could support (i.e. not more than 1 level of logic b/w flops). Actually, yes you could write your own BIOS in some HDL; there are several FPGA dev board that are "USB sticks." See [1] and [2].

[1] http://www.latticesemi.com/en/Products/DevelopmentBoardsAndK... [2] http://www.altera.com/b/nios-bemicro-evaluation-kit.html