[dhimes]

I had no idea that the manufacturing variation among chips is large enough to create performance tiers. Pass/fail I get, but this sounds like more extreme. Like, the difference between C and fail may be such that some non-negligible percentage of chips that test into the C bin should really be in the fail bin.

[alpine01]

It's many, many different things that can make the quality vary so much. From the purity and quality of the raw silicon itself, to the quality of the design of the chip itself, where some critical part of the chip architecture is incredibly hard to fabricate to the highest standard.

Remember that the widths of the oxide tracks within the silicon is on average 40nm these days (that's only ~400 atoms across!) or even smaller. with hundreds of process steps. One big molecule from some tiny error in the production process on the wrong part of the chip may not cripple it, but may impede performance, it's just probability at the end of the day.

With regards to potential fails going into production, it does happen, there are several test phases during production to catch as many as you can, but at the end of the day you won't get them all.

Semiconductor fabrication is fantastically expensive, new Fab plants cost several billion to build, so if you want to guarantee quality you have to pay for it.

[dhimes]

It does make sense in that they are always pushing the edge as hard as they can, and it sounds like this process allows them to do just that. They get to sell the 'lucky' results for a premium, their 'average' for their bread and butter, and even the sub-par chips provide income.

It seems like a really good idea. It also seems like it must be pretty hard to do in a way that gives you a reliable (say) 10% emerging as 'lucky.'

[sp332]

When the PS3 first came out, they were having really bad yield issues. The design of the chip is one slowish "normal" processor, plus 6 "synergistic processing elements" which were really fast little vector processors. Well, not exactly 6... If you look at the chip http://www.trustedreviews.com/Sony-PlayStation-3_Games_revie... you'll see 8! OK so one was reserved by the OS for a hypervisor that would run in the background all the time and was not available for mere mortals to access. But that still only explains 7. Turns out they just disabled one of the SPEs. They tested each of them and if one happened to be broken, they would pick that one to be disabled. This N+1 redundancy improved effective yields even though a lot of the chips were still broken!

[alpine01]

To be fair, those percentages I gave, I made up for that example. Though I'd imagine they are something close to that. But it depends on the chip, the market and the company selling them.

You design those percentage bands, generally to the size of the market you're aiming the chip tiers at. The silicon will be as good as they can get it generally, nobody wants to push bad products out. Recalls and returns probably cost more in the long term than failing more chips and suffering a worse yield.

However if only 0.5% of your customer base is interested in paying more money for a faster chip, you only cream off the top 0.5% of chips.

[comrade_ogilvy]

Keep in mind that chips can be tested at different frequencies with different amounts of input and expected output. So that C bin could have a perfect test score under certain reasonable conditions.

Clever little hardware hacks gives you oodles of geek street cred, but it may mean putting up with occasional bizarre behavior so that cred is well-earned. When silicon fails, the apparent effects can defy all logic. We can be talking about a logical AND that does something else entirely <0.001% of the time.

[nyskton]

They do the same thing with regular electrical components. Resistors for example have tolerance bands so they make a ton of them and then if it fits in the 1% range it gets marked with the 1% color band and sold for more than the 5% tolerance resistors. It's easier to change the marketing strategy than the manufacturing process.