[cpldcpu]

Wow! And it also implements a very interesting variant of SUBLEQ that is turing complete.

>This VM implements an OISC - a One Instruction Set Computer. That instruction takes three signed 32-bit operands, a, b and c, and runs a program from memory m[] as follows:

1 PC (program counter) starts at 0

2 Fetch the next instruction (32-bit signed operands a, b and c)

3 If the low bit on any operand is set, remove it, and replace that operand with m[operand] i.e., a dereference of that address

4 Set m[b] = m[b] - m[a]

5 If m[b] is 0 or negative, set the PC to c, otherwise increment PC by 3 words

6 Go to step 2

[jpegqs]

> 3 If the low bit on any operand is set, remove it, and replace that operand with m[operand] i.e., a dereference of that address

This dereference option makes a second instruction, this is not OISC.

[cpldcpu]

CISC view: Its another adressing mode.

RISC view: SUBLEQ is already four instructions (2x memory access, alu, branch)

[jpegqs]

3x memory access then, because read+read+write. And extra 0 to 3 reads in this work.