[wtallis]

The 2017 "launch" of Cannonlake wasn't something that anyone inside or outside of Intel could have reasonably considered to be a "routine burp". It was a desperate move to avoid shareholder lawsuits and possible criminal prosecution. Intel had to ship something under the 10nm label before the end of the year, because they had made far too many (false) promises that 10nm would be working Soon. Cannonlake was a mostly-broken chip because their 10nm process did not work, and Intel never even tried to make significant revenue from it or ramp it to volume production (though they kept promising for months that they were going to ramp). And it was still two years late.

Meanwhile, Intel's chip designers kept targeting an unusable process, and wasted years that they should have been iterating on designs for the fab process that actually worked. Skylake shipped in 2015. They didn't deliver a new CPU microarchitecture on 14nm until 5.5 years later, a year and a half after they shipped that same microarchitecture in a mobile-only form when their 10nm finally started to be somewhat usable (but not fast enough for desktop).

What were the chip designers doing for all those years? In 2015, Intel knew that 14nm had been harder to bring up than any previous fab process, and they knew that 10nm was proving even harder, but they refused to try making an updated CPU design for 14nm. How could the management not have realized that spending multiple consecutive years not shipping new designs would cause long-term damage to their capability to iterate on CPU designs? Not participating in the feedback loop of actually shipping left Intel with an oversized P-core design and an E-core design that wasn't well-matched to it, making Alder Lake awkward and slapdash when they finally got 10nm working well enough for desktop CPUs.

[spwa4]

Sure ... THIS is what I don't get. Non-technical (ie. CEO + board before Gelsinger) people are responsible for a technical disaster. They did not, of course, stop creating new technical disasters. Which ended in complete panic and Pat Gelsinger on top.

They complain about arrogance, but even if you accept that, it was arrogance BEFORE Gelsinger, with Intel under the control of MBAs that they're talking about.

And can I just say, I've seen some seriously arrogant assholes in the tech departments I've worked ... but for absolute incredible arrogance, you need MBAs.

[newsclues]

It’s almost like there is a deep cultural problem.

The leadership (not technical) are disconnected from reality.

Did engineers know there were problems? Of course, they are smart, but the leadership doesn’t listen

[Intoldie]

There was always a deep cultural problem in Intel - at least since otellini when I was there. But it's not just the management that was arrogant - engineers too were a bit arrogant because they were taught that Intel was the best. The cultural problem was Intel assumed that they did not need to look outside the company about how the world and tech landscape was changing, and really they assumed they could always depend on the semiconductor process advantage to cover design inefficiencies. So the whole company was living in the past. Plus they did not hire the best - either in terms of thought leaders or in terms of senior people who were really really innovative. Intel had or has this culture of hiring lots of recent college graduates who would push new designs that were iterative but they were not of the level of new patents, or truly an outcome of research. Whereas amd was being successful with a much smaller number of employees, because of new patents and hired mostly senior people.

Once Intel lost its research focus it became an extractive company extracting the riches that were already there, instead of creating true innovation. Case in point - Intel stopped doing it's research day long time ago.

[yvdriess]

In defense of the chip designers:

Design pipelines are deep and Intel at the time famously had very node-specific designs without industry-standard PDKs. The moment engineers were told to switch a design to 14nm, it basically reset the 5 year design-to-product pipeline. Management failed because they did not hedge the risk by starting a parallel 14nm design effort at first sign of 10nm troubles. They likely were engaged in magical thinking or some variation of the "Are YOU going to tell him?" Silicon Valley scene. It does not help that information like that is considered actionable insider trading information. I bet a lot of people working on 10nm designs first heard the news about the delays from the quarterly investor calls.

[wtallis]

> Design pipelines are deep and Intel at the time famously had very node-specific designs without industry-standard PDKs. The moment engineers were told to switch a design to 14nm, it basically reset the 5 year design-to-product pipeline.

Right. It was well-known publicly that Intel was running their business in a way that maximized the damage any fab troubles would have on their product roadmap. It was obvious a decade ago that Intel needed more flexibility to bring their CPU designs to other fab processes. It took them too long to start working on Rocket Lake, and too long to deliver it. But they have at least made some progress on the problem, since they've been selling x86 CPU cores made at TSMC for the past year.

(On a related note: Buying Altera and forcing them to port their entire roadmap over to a broken 10nm process was made even more stupid by the fact that Intel didn't have a usable PDK that outsiders and acquisitions could work with.)