[OJFord]

I didn't find that a particularly complete explanation - and the slot can't be closer to the CPU because? - I think it must be more about parasitic properties of the card edge connector on DIMMs being problematic at lower voltage (and higher frequencies) or something. Note the solution is a ball grid connection and the whole thing's shielded.

I suppose in fairness and to the explanation it does give, the other thing that footprint allows is a shorter path for the pins that would otherwise be near the ends of the daughter board (e.g. on a DIMM), since they can all go roughly straight across (on multiple layers) instead of a longer diagonal according to how far off centre they are. But even if that's it, that's what I mean by it seeming incomplete. :)

[Tuna-Fish]

> and the slot can't be closer to the CPU because?

All the traces going into the slot need to be length-matched to obscene precision, and the physical width of the slot and the room required by the "wiggles" made in the middle traces to length-match them restrict how close you can put the slot. Most modern boards are designed to place it as close as possible.

LPCAMM2 fixes this by having a lot of the length-matching done in the connector.

[ansible]

Generally speaking, layout for modern DRAM (LPDDRx, etc.) is a giant pain. Trace width, differential trace length matching, spacing, number of vias, and more.

And all this is needed even though the DRAM signaling standard has extensive measurement and analysis of the traces built right into the hardware of the DRAM and the memory controller on the processor. They negotiate the speed and latency at runtime.

Giant pain.

[throwaway48476]

Competes with space for VRM's.

[smolder]

Yeah, you can only make the furthest RAM chip in DIMM be so close to the CPU based on the form factor, and the other traces need to match that length. Distance is critical and edge connectors sure don't help.