[Tuna-Fish]

> and the slot can't be closer to the CPU because?

All the traces going into the slot need to be length-matched to obscene precision, and the physical width of the slot and the room required by the "wiggles" made in the middle traces to length-match them restrict how close you can put the slot. Most modern boards are designed to place it as close as possible.

LPCAMM2 fixes this by having a lot of the length-matching done in the connector.

[ansible]

Generally speaking, layout for modern DRAM (LPDDRx, etc.) is a giant pain. Trace width, differential trace length matching, spacing, number of vias, and more.

And all this is needed even though the DRAM signaling standard has extensive measurement and analysis of the traces built right into the hardware of the DRAM and the memory controller on the processor. They negotiate the speed and latency at runtime.

Giant pain.