[nick__m]

Why the ground planes are on layer 2 and 6 instead of 1 and 6 ?

Naively, as someone who doesn't have high frequency PCB design experience, I would have placed my grounds to form a shield and put my voltage plane on layer 3 or 4. I am sure that there is a good reason behind that choice but I don't see it.

[henrikf]

Putting ground planes on top and bottom layers isn't usually done with high speed PCBs because components are there. There would need to be a cutout on the ground plane near every chip. High speed signals really need continuous ground plane and ICs, especially RF ICs, need short access to ground. Second layer is the best layer to minimize the distance from ICs to ground plane.

[bangaladore]

It is common to route high-speed signals on the top and bottom layers to avoid vias that cause impedance mismatches even when back drilled ($$$).

To maintain a specific characteristic impedance, you need a plane (GND) some distance from the traces which themselves have a specific width. Without a plane under/above the signals, you can't get a specific impedance value.

You can additionally fill the top and bottom layers, which marginally affects the impedance.

[_Microft]

> Above is the final DDR3 routing on all the PCB layers. Layers 2 and 6 are ground, 5 is supply voltage, and others are reserved for signals. Two grounds are needed for correct impedances on the top, middle, and bottom traces of the PCB. With only one ground plane, the distance from the signal to ground would be too large on either the top or bottom layer.

Is the textual description in the article correct? To me the images make it look like signals are on 1 (red), 3 (orange) and 6 (blue), with ground on 2 (green) and 5 (pink) and supply voltage on 4 (teal). If you match some vias, you will find that 2 and 5 are definitely connected.

[henrikf]

That's a mistake in the text. You're correct that layers 2 and 5 are ground planes.

[nick__m]

thanks, layer 2 and 5 would fit the rest of the description and the reason would then be in the text :

  Two grounds are needed for correct impedances on the top, middle, and bottom traces of the PCB

[_Microft]

Here are some resources on PCB layer stack-up by the way. While I'm an amateur, they didn't sound unreasonable. Chapter 10[0] has a list of links to different layer stack-ups for boards with 4 to 10 layers.

[0] https://web.archive.org/web/20200124214936/http://www.hottco...

Edit: removed wall of links

[kurthr]

Obviously not the designer, but my guess is to lower capacitive loading on the matched high frequency signals (those with squiggles on top and flood underneath) and make modeling and IC mounting easier without flood. Note there's not flood near those either. I'm not quite sure on the ordering in the picture but it looks like 123/654? (edit ahh looks like the text was wrong and it is 123/456 with 2&4 Gnd). I'll note it looks like the internal "low speed" digital signals are squeezed between the gnd/pwr (edit: between gnd/gnd) planes, which is probably good since they're usually the biggest source of "noise" if you keep it away from other PCBs. You'd definitely want power/gnd planes immediately next to each other since bypass caps don't work at anything close to this frequency.