The main issue with the comments are people are mixing terms without knowing it.
To many a single instruction executed on a CPU is an atomic event. This is not the case for a circuit designer (and FPGAs are closer to circuit design as technically what you're doing is configuring them) For us an instruction on a CPU is a sequence of many smaller events, sometimes happening in parallel, which all need to be properly ordered to get a correct result. The most basic example is adding two multi-bit numbers, as was given in tremon's earlier comment, how does the next circuit know that all the bits in the result are ready to be consumed? To us those are parallel processes too, and we synchronize them. Sometimes by design (i.e. this process is guaranteed to complete before the next tick) and sometimes with a separate handshaking circuit. But no matter what, there is always some form of synchronization present in the machine itself.
If you step back and look at a flowchart or thousands of flowcharts that represent parallel tasks, I think the object of the patent is to get those flowcharts to propagate (i.e. execute on their own) without a processor. The propagation flow is always forward (not requiring a handshake) until a loopback is reached on the flowchart. A new propagation begins at the loopback destination block. The new propagation flow may or may not follow the same flowchart past depending on decision events. Synchronization takes place at the flowchart level and not at the circuit level. To synchronize, one flowchart sets a variable and other flowcharts can test the variable and decide what to do. The flowcharts are the code which synthesize directly to action, test and task objects without Boolean or state machine structures. These structures (circuits) are synchronous when the flowcharts are implemented in a standard FPGA but the flowcharts themselves remain asynchronous. The patent mentions an FPFA (field programmable flowchart array) that would use clock less circuitry.
Yes it is, transition systems are based on state and flowcharts are stateless but can easily be made statefull. I'm not a PhD but here is a PhD that states this although I don't agree with all of his conclusions. http://www.stateworks.com/technology/TN9-Flowchart-is-not-St...
That's the point to asynchronous flowchart programming. Everything is event driven unless timing is specifically specified on the flowchart and synchronization takes place on the flowchart. Flowcharts do not represent the flow of time they represent the flow of events. Timing closure then becomes ensuring that every atomic path on every flowchart meets a system throughput requirement. The flowcharts are partially ordered according to an algorithm that follows the flowchart lines and therefore ensures that these partial orders (atomic path's) are pipelined.