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by atomicflow
1493 days ago
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If you step back and look at a flowchart or thousands of flowcharts that represent parallel tasks, I think the object of the patent is to get those flowcharts to propagate (i.e. execute on their own) without a processor. The propagation flow is always forward (not requiring a handshake) until a loopback is reached on the flowchart. A new propagation begins at the loopback destination block. The new propagation flow may or may not follow the same flowchart past depending on decision events. Synchronization takes place at the flowchart level and not at the circuit level. To synchronize, one flowchart sets a variable and other flowcharts can test the variable and decide what to do. The flowcharts are the code which synthesize directly to action, test and task objects without Boolean or state machine structures. These structures (circuits) are synchronous when the flowcharts are implemented in a standard FPGA but the flowcharts themselves remain asynchronous. The patent mentions an FPFA (field programmable flowchart array) that would use clock less circuitry. |
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If not, I don't know of a way to make that machine without some timing assumptions. https://authors.library.caltech.edu/26721/2/postscript.pdf
Maybe other people do though...