[microarchitect]

not, you know, making low powered chips that work well.

I used to work for AMD, and I can sort of see the decision making that causes (allows?) this to happen. There were a lot of folks who were opposed to AMD entering the mobile phone, tablet and even netbook markets because margins in those segments are way lower than for the regular x86 chips.

Then, there are all the technical challenges in reworking fabs, design tools and microprocessor designs from being focused on high-performance towards low-power chips.

I'm not even sure Intel or AMD can produce chips that compete with ARM simply because of their size and the way the engineering organizations are set up. Each design involves hundreds of engineers and costs hundreds of millions of dollars, and I wonder if this style of engineering will be effective in competing against ARM, who seem to have relatively leaner, meaner and more agile teams.

Finally, even if Intel built a decent low-power chip, there's no guarantee customers will be queuing up to buy it. See what to happened to Itanium for instance.

TLDR: This is not as easy it looks for Intel because of three reasons: (1) lower margins (2) organizational intertia and (3) no guarantee of customers.

[hga]

I don't think the Itanium is a good counterexample for it ran 32 bit x86 software poorly and as I understand it it never met its general preformance promises. E.g. on the fly out-of-order execution engines (e.g. the Pentium Pro and on) beat VLIW and the best compilers for it to date (with some domains being exceptions, although by now probably not in price preformance).

At least here we're talking about low(er) power chips that support the well established Intel x86_32 and AMD64 macroarchitectures.

[microarchitect]

The assumption you're making is that if Intel designed a new chip from scratch it would "meet it's general performance promises". I don't think this is as easy it sounds.

[hga]

Given how much simulation they do ahead of time, especially if the chip is lower in CPU power (less expensive to simulate) I would actually expect them to be able to hit their targets/promises.

[microarchitect]

It's a reasonable expectation, but I've seen a few different chips tapeout and all of them missed their performance targets by varying amounts. There are just too many things that can go wrong, and unfortunately quite a few of them usually do.

You're right that the low-power ones probably have more accurate simulations than the high-end ones.