[hga]

I don't think the Itanium is a good counterexample for it ran 32 bit x86 software poorly and as I understand it it never met its general preformance promises. E.g. on the fly out-of-order execution engines (e.g. the Pentium Pro and on) beat VLIW and the best compilers for it to date (with some domains being exceptions, although by now probably not in price preformance).

At least here we're talking about low(er) power chips that support the well established Intel x86_32 and AMD64 macroarchitectures.

[microarchitect]

The assumption you're making is that if Intel designed a new chip from scratch it would "meet it's general performance promises". I don't think this is as easy it sounds.

[hga]

Given how much simulation they do ahead of time, especially if the chip is lower in CPU power (less expensive to simulate) I would actually expect them to be able to hit their targets/promises.

[microarchitect]

It's a reasonable expectation, but I've seen a few different chips tapeout and all of them missed their performance targets by varying amounts. There are just too many things that can go wrong, and unfortunately quite a few of them usually do.

You're right that the low-power ones probably have more accurate simulations than the high-end ones.