No it's obviously not going to be. You can write X86 SIMD code extremely effectively from a high level language. I want to write RISC-V/V code in C++, but if it ends up as carting around fixed width vectors then that's a loss.
That you can program in x86 SIMD in a high-level language and find it intuitive to use is remarkable. It was not designed for that and exposes primitives which make more sense for assembly-level and automatic compiler optimization. Cray, on the other hand, has a vector ISA that is explicitly designed for integration into high-level languages. You basically write a "for loop" like instruction which sets up the source and dest arrays, then do regular scalar operations (add, multiply, etc.) using virtual source & destination registers. It feels just like coding the CPU's integer APU. The CPU itself handles the magic of parallelizing these operations across its vector units.
So sorry I was a bit confused because Cray/RISC-V is explicitly designed to be easy to use from high-level languages in a way that x86's SSE et al were not. So I thought maybe you had mixed up the two in your question or something. But I guess you just haven't had the pleasure of working with a Cray before!