No it's obviously not going to be. You can write X86 SIMD code extremely effectively from a high level language. I want to write RISC-V/V code in C++, but if it ends up as carting around fixed width vectors then that's a loss.
That you can program in x86 SIMD in a high-level language and find it intuitive to use is remarkable. It was not designed for that and exposes primitives which make more sense for assembly-level and automatic compiler optimization. Cray, on the other hand, has a vector ISA that is explicitly designed for integration into high-level languages. You basically write a "for loop" like instruction which sets up the source and dest arrays, then do regular scalar operations (add, multiply, etc.) using virtual source & destination registers. It feels just like coding the CPU's integer APU. The CPU itself handles the magic of parallelizing these operations across its vector units.
So sorry I was a bit confused because Cray/RISC-V is explicitly designed to be easy to use from high-level languages in a way that x86's SSE et al were not. So I thought maybe you had mixed up the two in your question or something. But I guess you just haven't had the pleasure of working with a Cray before!
Can you show me any source code of a Cray being programmed in a high level language? What you describe sounds like a higher level ISA, but that has to be easily expressed in C++ for the argument to hold (or alternatively any high level language available at the time).
The thing with the Intel model is that although the programming model in the abstract is probably worse (although I'm curious if it allows a wider processor), it is trivial to use conceptually if you understand roughly which instructions you want i.e. it's just a blob as far as the compiler is concerned.
The compiler I work on supports Intel SIMD, I'm not sure it could be easily made to get the most out of a vector programming model without a lot of rewrites. It could, however, basically emulate the fixed width things in terms of a vector ISA if needs be.
You literally just write regular old C code doing a tight inner-loop computation, and use pragmas to tell the compiler what it needs to safely parallelize.
Of course these days you can do the same thing in any vectorizing compiler. But the point is that a modern vectorizing compiler has to do some pretty impressive transformations to generate SIMD code which looks nothing like the original, whereas the Cray code pretty much compiles to the same thing when vectorized.