[rob74]

Fascinating... in the phrase "replaces the VAX chassis, CPU, memory, KWV11-C clock and mass storage", the clock being mentioned separately intrigued me, so i googled it. Turns out that only the clock was a whole board full of good old TI 74x TTL chips - and a "used but working" board goes for 345$ on eBay (https://www.ebay.de/itm/M4002-KWV11-C-MODULE-USED-AND-WORKIN...)...

[cbm-vic-20]

The first-gen PDP-11's CPU was just a couple of boards full of good old TTL chips.

[GeorgeTirebiter]

Yes, the pdp-11/20, released in 1969. Core memory only. In my opinion, it took the pdp-11/45 to firmly establish an impressive new line of machines, separate and more powerful than the pdp-8 line. But, in DEC's way of thinking, it's instructive to note that a pdp-11/40 was used as the console of the DECsystem-20. Separately, it's a shame we no longer have 36-bit machines; 36-bit ints would hold time_t just fine, and 72-bit doubles will work great for science. Oh well. What we're stuck with now bytes.

[noneeeed]

I remember reading an old paper on some funky experimentat user-interface that used a pair of PDP-11s (possibly, might have been event older) essentially wired together at the busses, with extra instructions added with new logic in TTL silicon, I think it was for doing the maths for the vector graphics. It was amazing the amount of hardware hackery that was necessary to build these experimental systems.

[Taniwha]

Actually I think those were Vaxen

https://gunkies.org/wiki/VAX-11/780#Dual-CPU_experiment

[TheOtherHobbes]

Compared to x nm VLSI, TTL and ECL are ridiculously low density. And soooo sloooow.

DEC were very pleased with themselves when they got to ~40VUPs in the later ECL models, but a full modern VLSI - not FPGA - implementation wouldn't break a sweat at 1000VUPs.

[dfox]

What seems particularly interesting is that the board seems to really be just an RTC, yet does not have any obvious place for backup battery and has 10MHz oscillator on it.