[reason-mr]

I did my Ph.D. thesis on a Sun 4/110 connected to a VME transputer board and from there into a larger transputer array, using T-800s. Amazing and way ahead of the times - what really killed things was a combination of the removal of financial support by the UK Govt, and also an unexpected increase in the clock frequency of single core CPUs, rendering anything which was not on the latest process out of date. Then the UK went into recession, and many good people left. Some went to the west coast US, other took teaching positions in places like Australia. I do always wonder what could have become of the UK computer industry in the early 90's had it been appropriately funded at the right time (via something like DARPA). But instead, the concentration went into turning London into a financial hub.

[fanf2]

What killed the transputer, from the technical point of view, was the failure of the T9000. Its target clock speed was, IIRC, 50MHz (it was roughly contemporary with the first Pentium) but Inmos has terrible problems getting it to run at more than about 20MHz

So companies that had been building large multiprocessors using transputer switched to other architectures, eg Meiko who were in the building next door were making machines with SPARC CPUs and their own interconnect.

The T9 was cool, though. The transputer instruction set was a stack-based byte code, very dense but by the 1990s not that fast, because of the growing discrepancy between CPU speed and memory speed. So the T9 had an instruction decoder that would recover risc-style ops from the stack bytecode. It was helped a bit because the transputer had the notion of a “workspace”, a bit of memory (about 16 words) that a lightweight process could access with very short instructions - in the T9 this effectively became the register set. The T9 would have been a very early superscalar CPU.

And the T9’s new fast serial links used a relatively efficient layer 1 signalling scheme that was later reused for IEEE 1344 Firewire.

(I was an intern at Inmos between secondary school and university, 1993-1994, when this was happening.)

[UncleOxidant]

> unexpected increase in the clock frequency of single core CPUs

The 90s were brutal for alternative architectures like the Transputer because performance of Intel processors were significantly improving just about yearly. I recall a neural net chip startup company near where I live - they did some cool science Saturday presentations for the public where they explained how neural nets worked (this was the early 90s). But unfortunately, they only lasted a few years - they were only about 25 years ahead of their time. Now here we are in the 2020s and alternative architectures are sprouting like dandelions.

[reason-mr]

And also - while we are on the subject of british parallel computing - have a look at this : https://link.springer.com/chapter/10.1007%2F3-540-17943-7_12... - Cobweb - wafer scale VLSI in 1987

[cesaref]

I attended Bristol Uni's Computer Science department in the late 80s. They had a room of Sun 3s which had transputer cards, which were programmed in occam in a weird folding editor. It was clearly the future, and all programming would look like that in the future (hint, not the one I ended up living in).

I also seem to remember seeing a demo of a mandlebrot set being rendered impressively quickly in parallel on a transputer based machine, which I think was a cube shaped machine. A quick look on the web doesn't throw up any obvious hits though.

[voldacar]

https://www.youtube.com/watch?v=W17opJa9KGY

might have been this one? or perhaps the following old demo:

https://www.youtube.com/watch?v=cdK3PXKvYgs

[youngtaff]

Bristol has many silicon design companies based around it, and they're often credited to Inmos being there first

[criddell]

Could the cube shaped machine be a SGI Iris?

[cesaref]

Just found reference to it on David May's page, which is suitably retro html for the Inmos architect who created occam and did all sorts of interesting things like formally prove their FPU implementation (before formal proofs for that sort of thing were common):

http://people.cs.bris.ac.uk/~dave/transputer.html

'The B0042 board contains 42 transputers connected via their links into a 2-dimensional array. A number of them were built following a manufacturing error - all of these transputers were inserted into the packages in the wrong orientation so were fully functional but unsaleable. I had them all (around 2000) written off for engineering use and we built the B0042 'evaluation' boards! Many of these were given to Southampton University where they were assembled into a 1260 processor machine and used for experimental scientific computing. Inmos used them in a number of exhibitions (in a box of 10 boards - 420 processors) drawing Mandelbrot sets in real time!'

Sounds like the machine I remember, a 420 processor machine in a box in the late 80s was quite something.

[fanf2]

No, that didn’t contain any transputers, but it might have been a Parsytec GigaCluster

http://www.geekdot.com/category/hardware/transputer/parsytec...

[jz391]

Similar story: large chunk of my PhD at Bath in early 1990s involved porting Helios (which was developed on/for Transputers) to Intel i860. Fun times...