[fanf2]

What killed the transputer, from the technical point of view, was the failure of the T9000. Its target clock speed was, IIRC, 50MHz (it was roughly contemporary with the first Pentium) but Inmos has terrible problems getting it to run at more than about 20MHz

So companies that had been building large multiprocessors using transputer switched to other architectures, eg Meiko who were in the building next door were making machines with SPARC CPUs and their own interconnect.

The T9 was cool, though. The transputer instruction set was a stack-based byte code, very dense but by the 1990s not that fast, because of the growing discrepancy between CPU speed and memory speed. So the T9 had an instruction decoder that would recover risc-style ops from the stack bytecode. It was helped a bit because the transputer had the notion of a “workspace”, a bit of memory (about 16 words) that a lightweight process could access with very short instructions - in the T9 this effectively became the register set. The T9 would have been a very early superscalar CPU.

And the T9’s new fast serial links used a relatively efficient layer 1 signalling scheme that was later reused for IEEE 1344 Firewire.

(I was an intern at Inmos between secondary school and university, 1993-1994, when this was happening.)