| There was. But for Mips. By Microsoft which used NetBSD. https://www.microsoft.com/en-us/research/project/emips/ https://www.microsoft.com/en-us/research/publication/multico... http://blog.netbsd.org/tnf/entry/support_for_microsoft_emips... The thing is, this is not just another step up in complexity as another poster wrote here, but several. Because it requires partial dynamic reconfiguration, which works with ram based FPGAs only (the ones which load their bitstream(containing their initial configuration) on startup from somewhere), not flash based ones which are "instant on" in their fixed configuration. Regardless of that, partial dynamic reconfiguration takes time. The larger the reconfigured parts, the more time. This is all very annoying because of vendor lock in because of proprietary tools, IP-protection, and so much more. The few fpgas which have open source tool chains are unsuitable because they are all flash based AFAIK, and it doesn't seem to be on the radar of the people involved in developing these, because why, if flash anyways? |
Not true at all. The flagship open-source FPGAs are the Lattice iCE40 series, which are SRAM-based. There's also been significant work towards open-source toolchains for Xilinx FPGAs, which are also SRAM-based.
The real limitation is in capabilities. The iCE40 series is composed of relatively small FPGAs which wouldn't be particularly useful for this type of application.