[duskwuff]

> The few fpgas which have open source tool chains are unsuitable because they are all flash based AFAIK...

Not true at all. The flagship open-source FPGAs are the Lattice iCE40 series, which are SRAM-based. There's also been significant work towards open-source toolchains for Xilinx FPGAs, which are also SRAM-based.

The real limitation is in capabilities. The iCE40 series is composed of relatively small FPGAs which wouldn't be particularly useful for this type of application.

[nereye]

Lattice ECP5 is an SRAM-based FPGA which has up to 84K LUTs (vs ~5K for iCE40) and is supported by an open source tool chain. E.g. see https://https://www.crowdsupply.com/radiona/ulx3s.

[LargoLasskhyfv]

OK? I didn't follow the efforts for Lattice because insufficient resources for my needs. I'm aware of efforts for Xilinx, but they aren't covering the SKUs/models I'm working with. Is there anything for Altera/Intel now?

[duskwuff]

I'm not aware of any significant reverse-engineering efforts for Intel FPGAs. QUIP [1] might be an interesting starting point, but there may be significant IP licensing restrictions surrounding that data.

Out of curiosity, which Xilinx models are you hoping to see support for?

[1]: https://www.intel.com/content/www/us/en/programmable/support...

[jecel]

Here is a project to reverse engineer the Xilinx series 7 FPGAs to be able to target them with open source tools:

https://github.com/SymbiFlow/prjxray