[kllrnohj]

I think that's vastly overstating Apple's importance. TSMC has had a significant, steady cashflow from far more than just Apple over the years. Nvidia would if anything be the more likely one pushing TSMC's top end, as Nvidia makes by far the largest, highest performance dies out of anyone on TSMC. Apple's latest & greatest A14 only just hits the transistor count on TSMC's 5nm that Nvidia was pushing 4 years ago on TSMC's 16nm.

Apple's extra cash certainly didn't hurt, but TSMC wasn't struggling before Apple came along, either.

And prior to 7nm the other major fab, Global Foundries, as perfectly competitive with TSMC despite not having any Apple money.

[jagger27]

If Nvidia was such a key partner for TSMC then why did they get priced out of 7nm? Nvidia made some huge chips on 16nm and 12nm, no doubt. I’m not so sure the transistor count comparison is all that meaningful though. Maybe compare the wafer allocation instead.

Clearly TSMC is heavily diversified and gets to pick their clients. Apple has also been the primary (volume) launch partner on both 7nm and 5nm, which to me indicates how much TSMC values that partnership. Imagine the slam dunk Nvidia would have had if the RTX 3000 series was on 5nm.

[kllrnohj]

> If Nvidia was such a key partner for TSMC then why did they get priced out of 7nm?

They wanted more margins? But note that Nvidia does still use TSMC's 7nm for their largest & most expensive dies. The A100 is TSMC 7nm at a staggering 54 billion transistors on 826mm² of silicon. Nvidia retains the largest die manufactured on TSMC's 7nm. By a lot. The next largest would I think be Navi 21 at 536 mm² and 26.8 billion transistors.

> Apple has also been the primary (volume) launch partner on both 7nm and 5nm

Apple's die sizes & transistor counts are comparatively tiny. The first use of a new fab is pretty much always a small, low-power die. That's what yields best when yields are the lowest.

See also why Snapdragons are also among the first to launch on a new TSMC node, despite those SoCs having probably the lowest margins of the high-volume stuff TSMC makes.

[jagger27]

I’m not convinced that Nvidia having the biggest die size is a particularly important metric here. It’s obvious to me that TSMC would rather produce tiny Apple chips and AMD Zen chiplets to for yield and wafer space efficiency. We all know that smaller rectangles pack better into circular wafers than big rectangles.

Apple could have made the A14 much bigger and faster than the A13, but they chose to cram more chips on the wafer, which I speculate they did to have more wafers available for their bigger upcoming iPad and Mac chips.

I think you have it backwards on margins. Per square mm it’s clearly more expensive to produce an A100 die than an A13 or Snapdragon SoC due to the wasted die space and need for golden samples on the Nvidia side of things where they’re not selling any cut down dies in GeForce cards.

[kllrnohj]

> TSMC would rather produce tiny Apple chips and AMD Zen chiplets to for yield and wafer space efficiency.

TSMC sells wafers, not functioning dies. They don't care how you slice it up or how bad you yield as a result.

[jagger27]

I was going to mention this. The point is that Apple and AMD buy more wafers.

It’s rumoured that Nvidia’s deal with Samsung was for working dies, not total wafers.

[Symmetry]

They did make a habit of badmouthing TSMC whenever they had problems. That probably played a role in TSMC allocating their scarce 7nm capacity away from NVidia when it was in short supply.