Hacker News new | ask | show | jobs
by acrossthepond10 2224 days ago
FPGA Noob here. I have 2 questions about FPGA's that I'm hoping someone here can help me out with:

1. For the FPGAs i've looked at, you seem to have to initially configure them before being able to run your programs on them, kind of like EEPROM. I feel it would be much more interesting from a reconfigurable computing perspective if the devices were able to programatically re-configure on the fly as easily as it is to read and write to DRAM or Flash Memory. So what are the barriers that prevent the hardware from being able to do this?

2. Its exciting to see projects like Symbiflow making great progress, but after reading some expert opinions[1] it seems like an extremely difficult challenge to attempt to reverse engineer hardware from commercial FPGA vendors who wish to keep their designs closed in order to protect their IP and compete. So my question is wouldn't it be a more feasible goal to construct fully open FPGA platform from scratch, just like RISC-V is doing with CPUs? What would the obstacles be here?

Thanks!

[1] https://www.reddit.com/r/FPGA/comments/a5pzs5/prediction_ope...

3 comments

1. Most higher capacity FPGA have a features called "partial reconfiguration" where you can reload a part of the FPGA with a new bitstream. This new part can usually come from anywhere (PCIe, SPI, ...)

2. RISC-V is a ISA. It's not an implementation. You can implemented it on FPGA or ASIC. When you implement a RISC-V on an FPGA, it will cost you between $2 and maximum a few $1000 in silicon. FPGA technology itself is something that can only reasonably be implemented in an ASIC. The initial cost of an ASIC can go anywhere from $100K (on a very old process) to multiple millions.

1. I'm not sure what you mean but remember that FPGAs don't run programs as per se (HDL gets compiled to logic, not instructions). The bitstream can be modified, it just gets loaded from some flash. I'm not sure where it's done, but it's possible.

2. The obstacles are billions and billions of R&D (and you'd need similar amounts to get a fab pick up the phone too). Reverse engineering the bitstream is also difficult because of this - Symbiflow (i.e. Trellis etc.) have got the bulk of the bitstream done (apart from specialized blocks like those for DSP), but you need to have good algorithms to decide what to do with that bitstream e.g. a fully open source flow requires intricate timing analysis.

Regarding 2: the question was about an open-source solution, so I think that "billions and billions of R&D" will translate to just a lot of time spent and no literal cost, e.g. just like GCC is free as in beer.

It is true that getting a wafer fabricated will cost a lot of money (in the millions maybe?) but this may be money well spent because the resulting FPGA design can be used over and over. I think this would be in the reach of perhaps some universities or government technology centers, if someone could formulate the case for it.

Nearly all the cool stuff in GCC and LLVM is paid for by companies (paying the salaries of developers). The software could definitely be done in this way (Symbiflow is very very nice), but keep in mind that developing an FPGA will require a lot of hardware and bums in seats.

The question is similar in scale to building an open source Intel core i7 - it's not impossible but keep in mind that an FPGA big enough (for example) to prototype any subsections of the CPU let alone the whole thing would cost hundreds of thousands.