> I don't think we have good models for power consumption to find out in a simulation, either.
There are excellent models available to predict power consumption but you'll need access to the processor RTL (the design of the processor typically written in a language such as verilog or vhdl) and / or the outputs of the implementation flow (like the netlist which is the description of the actual logic gates and their connectivity) to be able to use them.
Such things are normally not available outside the company building the processor and potentially their customers.
Branch prediction can usually be disabled during processor initialization (as well as other features like cache).
I was bringing up Linux on new hardware one time. What was happening was it would get partway into booting and then crash at a random spot. In the kernel config there's an option to disable the D-cache and I found that it would boot fine with it disabled. Turns out the root problem was that the processor voltage wasn't being set high enough, and that disabling D-cache must have reduced power consumption enough to allow it to boot at a lower voltage.
There are excellent models available to predict power consumption but you'll need access to the processor RTL (the design of the processor typically written in a language such as verilog or vhdl) and / or the outputs of the implementation flow (like the netlist which is the description of the actual logic gates and their connectivity) to be able to use them.
Such things are normally not available outside the company building the processor and potentially their customers.