[gchadwick]

> I don't think we have good models for power consumption to find out in a simulation, either.

There are excellent models available to predict power consumption but you'll need access to the processor RTL (the design of the processor typically written in a language such as verilog or vhdl) and / or the outputs of the implementation flow (like the netlist which is the description of the actual logic gates and their connectivity) to be able to use them.

Such things are normally not available outside the company building the processor and potentially their customers.