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by jdsully 2506 days ago
That is true with Intel chips as well. In the HFT space people actively work with Intel to determine which cores they should pin tasks to.

The speed of light is constant, and some cores will always be a little closer to various resources.
1 comments
shaklee3 2506 days ago
That was true before Skylake, but is no longer true since they moved away from the multi ring architecture.
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jdsully 2506 days ago
Even with the mesh the number of hops is variable based on which core is requesting and the physical geometry of the chip. The cores right beside the IMC will have the lowest latency. See this diagram: https://en.wikichip.org/wiki/intel/mesh_interconnect_archite...

The main improvement is the max number of hops is log(n) instead N/2.

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