[shub]

They're not that different, either. It's been a long time since high-performance cores were executing the instructions as fetched and not translating into µops. The stuff Intel does on their chips works on ARM too. People are doing it, and it's working[0]. That makes a hell of a lot more difference on throughput than what ISA is implemented.

[0] https://fuse.wikichip.org/news/1316/a-look-at-caviums-new-hi...

[ebikelaw]

Actually the x86 instruction format is key to Intel's performance dominance. It happens to be rather dense in terms of instruction per byte, and it turns out that instruction cache hit rate (and iTLB hit rate) are extremely important to high performance. Rather than the naive view that x86 is somehow saddled with its ancient and ugly instruction set, it's actually all of the RISC-like architectures that turn out to be hampered by their overly beautiful instructions.

[StillBored]

The other way to think about it is like the v7 thumb modes in comparison to the original 32-bit predicated instruction set. X86 has a lot of less than ideal instructions, but they are uncommonly used. So the core instruction set is quite dense and high performance.

Intel is learning (or knows, depending on your perspective, see goldmont) how to build highly efficient cores too, but like ARM haven't quite figured out how to build a super high performance one that is crazy efficient. ARM's continue to be quite efficient but not particularly performant, while intel's continue to be quite peformant but not particularly efficient.

Either way, the trend is pretty clear at this point more power dissipation=more performance.

[ant6n]

Most memory is data.

Code density is important, but you can just double the icache. Given that icache is often smaller than dcache, it seems that's not the major bottleneck.

Also, if code density is so important, why did arm drop Thumb when they switched to 64bit?