[sector777]

Is this fixable in the next generation in hardware, or is this a permanent tax on performance going forward?

What I mean is (using a hypothetical): Suppose there's a flaw in the arithmetic unit (e.g. integer division). There's a microcode update, all integer divisions are correct, but run at 86% of previous performance. In next generation, the hardware is fixed and performance will be back up to 100% of designed performance.

Does the same type of handwaving apply to these types of security exploits?

[pkaye]

I think Intel can take the same approach as AMD for some of the issues. For this remaining issue, I think there might be solutions with minimal performance impact when you are doing a full chip redesign. For example, have a separate branch prediction hardware for privileged code execution? An additional cache area for speculated reads?