[astrodust]

It wasn't that CISC won or that RISC lost, it was that the architectures got so blurry you couldn't tell one from the other. There's so much microcode in a CPU now that the instruction set is just the icing layer on the cake. Internally there's surprising amounts of commonality between PowerPC, ARM and x86 type chips.

Plus PowerPC started to adopt CISC-like instructions, x86-64 started to adopt RISC-like features such as having a multitude of generic registers, and here we are where nobody cares about the distinction.

Don't forget that while Intel won in certain markets, like notebooks, desktops and servers, it's absolutely, utterly irrelevant in other places that ship far, far more CPUs. A typical car may have as many as one hundred CPUs of various types, typically at least fifty, many of them PowerPC for power and legacy reasons. Your phone is probably ARM. Remote controls. Routers. Switches. Refrigerators. Thermostats. Televisions and displays. Hard drives. Keyboards and mice. Basically anything that needs some kind of compute capability probably has a non-Intel processor.

If there's a quagmire we're stuck in it's that we're surrounded by thousands of devices that are likely full of vulnerabilities that can never, will ever be fixed.

[Taniwha]

Actually most real RISC CPUs have no microcode, and if they do it's really just the same instruction set running out of an exception handler, not hardwired stuff on some other lower level private ISA

[astrodust]

Is PowerPC still considered RISC? That instruction set has evolved considerably from the 601 days.

What is a "real" RISC CPU? By what definition?

[Taniwha]

Well, there's lots of definitions - I'd include anything that generally has:

- single cycle ops - easy to decode ops (fixed size) - load/store architecture - lots of registers to reduce pressure on memory

[nickik]

> and here we are where nobody cares about the distinction.

Exept, you know the people who created RISC-V. They specifically named it RISC-V to reiterate the point the were making of the advantages of RISC.

Its a literal statment to anybody saying 'Your doing it wrong, RISC is better, so again, RISC-V, please use it'.