I think we will see some breakthrough after the CPU industry goes into an existential crisis about going below 5nm. Current pipelines are just so damn expensive to replace that we will see gradual innovations. For example TPU-s[1] might be a standard in a few years like GPU-s are now.
The current trends are clearly in reducing power usage and size. That alone will be a huge innovation when I can hold a "server farm" in my pocket.
About using light: I don't believe light will replace the transistors performing logic except in a few niche applications (e.g. [1]). Light is physically constrained by it's wavelength. It's difficult to build interacting structures smaller than a few hundred nm and it's difficult to build light-generating elements with even shorter wavelengths--you're approaching the Deep UV and X-rays. Maybe you can get to the tens to low hundreds of nm with plasmonics, but this is still far from the realm in which it makes sense to replace an electronic transistor with an optical transistor. Furthermore, it's also difficult to achieve strong nonlinearities in optical systems, especially silicon. You need some sort of nonlinear element for switching.
Light-based communication probably will replace certain I/O blocks on chip. These tend to be quite large in terms of area after considering power and ESD constraints.
It's not a goal I guess to shrink these "photon CPU-s" to 5nm at start.
> but this is still far from the realm in which it makes sense to replace an electronic transistor with an optical transistor
The electromagnetic spectrum even at mid-near infrared wavelengths frequencies could help chips operate on the THz scale! You might list a mountain of reasons it can't work, but it's just fun to imagine that it might be possible to turn a cycle of light to an operation.
You can build interesting things at that scale, in this research they also refer to communication as you mentioned [1]
We're not likely to get below 3nm. We getting into the realm of making things on a feature set of a handful of atoms. It's insane we've got this far.
Then there's the matter of using this for production of large scale shipping chips. Note the POWER9 (IBM's next big chip) is expected to be produced on 14nm.
> we'd need a paradigm shift?
Yes we're coming to the end of the road for traditional CMOS chips. I don't think anyone really knows what's next as there's no clear successor.
I would speculate in the coming years we'll be seeing more performance coming from invocations in the data path for general purpose computing. Of course exploitation of massive parallelism will continue.
"The company’s 0.13-µm chips, which debuted in 2001, had transistor gates that were actually just 70 nm long.
[...]
Through all this, node name numbers continued to drift ever downward, and the density of transistors continued to double from generation to generation. But the names no longer match the size of any specific chip dimension. “The minimum dimensions are getting smaller,” Bohr says. “But I’m the first to admit that I can’t point to the one dimension that’s 32 nm or 22 nm or 14 nm. Some dimensions are smaller than the stated node name, and others are larger.”
The switch to FinFETs has made the situation even more complex. Bohr points out, for example, that Intel’s 22-nm chips, the current state of the art, have FinFET transistors with gates that are 35 nm long but fins that are just 8 nm wide."
If there wasn't such an enormous difference between the two, I bet some foundries would have silently started reporting transistor sizes in nautical miles (nm) in order to ensure the number kept decreasing.
Coarser processes have their benefits, especially when they've matured for a while. When you're building a large chip you start really thinking about yield. Coarser and more mature processes give better yield.
I would assume that maximum yield would be achieved by very accurate machinery making coarse chips, like using 14nm lithography to make 22nm chips, but this is rarely done in practice, I think.
1nm isn't a special number just because it is 1. A nm is one billionth of a metre which itself is an arbitrary length so 1nm is a purely arbitrary cut-off.
What you should be asking is how many molecules of silicon and silicon-germanium can be packed into the spaces being talked about at the different fabrication levels of 14nm, 10nm, 7nm, 5nm, and so on.
Once you have that information then you can ask what is the smallest number of molecules that these processes can scale down to. Only then we can start asking about physical limits and more exotic processes. Are we talking about features of 50 or 40 molecules across or what?
All I know is that 1nm is not a magic number and that predictions about the demise of transistor scaling have always turned out to be wrong. My prediction is that, as unimaginable as it seems, we'll be able to scale down to the physical limits of the materials.
>All I know is that 1nm is not a magic number and that predictions about the demise of transistor scaling have always turned out to be wrong. My prediction is that, as unimaginable as it seems, we'll be able to scale down to the physical limits of the materials.
This is very important to be pointed out. The burden of proof should be on the people who suggest that "this time it is different", not on those who correctly assumed that technology tends to progress in time.
Isn't a silicon atom only like .2 nm wide? My guess is that a gate needs to be at least a few atoms wide so 1nm would seem to be decently close to the literal limit for silicon.
According to my very unscientific googling, a silicon atom is approximately 111 picometers, or just over 1/10 of a nanometer. So if we can make stable gates with only 3-4 Si atoms, we can definitely go below 1nm.
We simply don't know what the smallest thing we can compute with is. A material scientist might say that the smallest silicon traces that can do the are X nanometers, then another will come along and say he is right, but we can use gallium-arsenide to get down to X-5 nanometers. And this progressive 1 upping has fueled Moore's law
There are people doing research on subatomic who think that various quarks have interesting properties for computing. This may or may not be possible. But we likely don't know yet.
Node names used to refer to transistor gate length, but now they're pretty arbitrary, and gate length is typically 2x or more than node name. The "1nm" node would still have very small feature sizes though.
Using light: http://gizmodo.com/a-new-light-based-transistor-could-comple...
Building on memristors: http://www.memristor.org/reference/research/13/what-are-memr...
http://spectrum.ieee.org/semiconductors/design/the-mysteriou...
Neural network inspiried chips: http://www.research.ibm.com/articles/brain-chip.shtml
I think we will see some breakthrough after the CPU industry goes into an existential crisis about going below 5nm. Current pipelines are just so damn expensive to replace that we will see gradual innovations. For example TPU-s[1] might be a standard in a few years like GPU-s are now.
The current trends are clearly in reducing power usage and size. That alone will be a huge innovation when I can hold a "server farm" in my pocket.
[1] https://cloud.google.com/tpu/