Everybody who has programmed in VHDL or Verilog knows that building hardware is very close to writing software actually. It's just a level of abstraction lower, and there is a lot more parallelism, but the concepts are very similar.
Synthesizing ASICs and FPGA designs from Verilog/VHDL/insertnewhighlevellanguagehere may be close to software, but I guarantee you that creating high end production chips with such strict efficiency constraints guarantees that you need to do heavy simulations, and most importantly, has massive verification (it is 10/7nm after all....) efforts.
Writing HDL is quite similar to software, but the "stack" you deal with is entirely different. It's like saying that writing embedded C is similar to front-end JS (hardware interrupts vs. events, external world vs. DOM, input voltage vs. user input, etc.).