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by amelius
3371 days ago
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Everybody who has programmed in VHDL or Verilog knows that building hardware is very close to writing software actually. It's just a level of abstraction lower, and there is a lot more parallelism, but the concepts are very similar. |
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Synthesizing ASICs and FPGA designs from Verilog/VHDL/insertnewhighlevellanguagehere may be close to software, but I guarantee you that creating high end production chips with such strict efficiency constraints guarantees that you need to do heavy simulations, and most importantly, has massive verification (it is 10/7nm after all....) efforts.