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by KMag
3980 days ago
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One thing I've wondered about recent ISAs is regarding split register files. Since most CPUs are single-chip implementations these days, why not have integer, fp, and vector registers unified at the ISA level to allow different implementation points and less state spilling/loading during context switches: (1) High performance implementations use register renaming anyway, so they can easily use a split register file internally without exposing it at the ISA level. (2) Low power implementations can use a single register file (at the cost of fewer I/O ports). This would also mean that when switching threads, only a little bit more state than the vector unit registers would need to be stored and loaded. |
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> "a split organization increases the total number of registers accessible with a given instruction width, simplifies provision of enough regfile ports for wide superscalar issue, supports decoupled floating-point unit architectures, and simplifies use of internal floating-point encoding techniques. Compiler support and calling conventions for split register file architectures are well understood, and using dirty bits on floating-point register file state can reduce context-switch overhead."
(1) Not really. It's easy to go from ISA says "split" and your processor uses "unified", but it's much harder to go the other way with it... the whole point of a unified ISA register file is you can trivially write to a "FP" register and then read it for a "integer" ALU operation. Now you've made that very hard if you try to internally split the RF.