[pogden]

To be fair, it's Hardware Description Language, not Hardware Synthesis Language. HDLs are mostly tools to support V&V, it's just that synthesis is the most convenient way to ensure that an implementation is consistent with the HDL description.

[makomk]

Yeah, I believe originally all the HDLs were intended for simulation of designs which were then implemented by hand. Neither Verilog nor VHDL was processor designed for synthesis, which is probably why it's so quirky.