[yuvi]

>it's nicely coherent, has nicely orthogonal features

Obviously with exceptions, especially with the instructions added after armv4.

For instance, the allowed addressing modes vary depending on instruction: ldr allows a 12 bit offset, ldrd only an 8 bit, ldm and vld allow none, though vld allows a strided increment. Only ldr* non-exclusive allow a register offset.

Thumb-1/2 and exclusive load/store change things a bit more, but they aren't generally stuff to care about unless you're doing kernel or compiler programming. Also, none of the neon instructions can be conditionally encoded, but there isn't much reason to do that.

As for desktop arm, a massively multicore machine would be nice, but the average user doesn't care much about desktop CPU power consumption nor make good use of more than two cores. Netbooks have to watch out though.