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by aylons
4065 days ago
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Interesting. Is there any reference, or tutorial, for a fellow FPGA developer who are interested in studying OpenCL for FPGA? Also, is there a link for your thesis? What kind of data processing was needed? I mostly work with signal processing for RF signals, pipelining data from ADCs. |
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No link for my thesis, can send you a pdf if you want. In terms of what was needed, my kernel was the simulation inner-most loop that would take in 4 values(2 floats, a const int and a double) per neuron and use them to update the neurons state. The simulation ran at a resolution of 1ms, with values between 1k and 100k neurons.
In essense it was high repetition, low complexity, high memory calculations.
Infact, what I experienced was that a) the biggest overhead is actually setting up the kernel and b) you have to take into account the memory requirements.
Biggest upgrades in performance came from transitioning the data transfers from synchronous to asynchronous, (to alleviate memory bottlenecks as much as possible), and from increasing the number of neurons.
Most interesting bit was that due to the simulation characteristics (Izhikevich model of a SNN), the firing rate dropped aroud 20-30k neurons. With a low firing rate, I could simulate in real-time (ie 1ms of simulation in 1ms of real time) 18k neurons, and 80k neurons due to disparities in firing rates