[correnos]

One difference from Verilog/VHDL is that Cx will handle state machines for procedural code automatically. Bluespec has a similar facility. Also like Bluespec, it makes the clock implicit which makes a lot of code less noisy.

[jclis]

I looked at Bluespec before I tried Cx, it has good points and very powerful features (parameterization of modules comes to mind), but overall I find the semantics to be too complicated for my taste. Rules firing in parallel with custom priorities and possibly non-deterministic?

[correnos]

Bluespec's thing is that rules are atomic, so they won't ever (appear to) fire in parallel. This is in contrast to Verilog and friends where that isn't guaranteed. The nondeterminism comes in when two conflicting rules are both ready to fire: they can't both fire, so the system needs to choose one. You're warned when the compiler detects this, and it can be resolved by giving one a higher priority.

I personally didn't find the semantics to be unreasonably complicated, but the type system is very much based on Haskell's so if you're not used to that there'll be more of a learning curve.