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by jdboyd
4190 days ago
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#3 seems like it could even be a legitimate optimization. #4, If they did a SRAM write, then a EEPROM write and only raised an error when the EEPROM write failed, your suggestion would seem plausible, but since they do an SRAM write, then raise an error because the SRAM write worked, it is hard to believe this isn't an intentional protection feature. |
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