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by qwerta 4190 days ago
Future is uniform SOC where some features are disabled depending on price.
3 comments

By disabled, do you mean the same processor design being binned into varying qualities of chip? In that case, it seems much more cost effective, and environmentally friendly, to send out chips with bad sections disabled at a lower price rather than to chuck them out.
More like 'disabled by scoring a large 'X' with a laser across the die for those features that are to be disabled'.
Yes, but only for those chips who would be binned in the high-end and go unsold.

And you can just design a couple on-chip fuses that can be broken in early stage testing. No need for lasers.

I've been playing with the Renesas RZ/A1 line, which comes with three sizes of eDRAM on board: 3, 5, and 10MiB. The price differences between them are so large it sure seems like they're binning the parts.
You obviously are not familiar with the semiconductor industry. Binnig has nothing to do with price differences.
20-30 years ago, x87 math processors were on a different chip. L2 SRAM caches were also on a different chip.

7 years ago memory controllers were on a separate chip.

Maybe 20 years from now, CPU needs just power and optical links. Some for inter-CPU communication. Other optical links go to USB 5.0 peripherals.