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by apw
4327 days ago
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One possibility is to use the neuromorphic chips as souped-up branch predictors -- instead of predicting one bit, as in a branch predictor, predict all bits relevant for speculative execution. This can effect large-scale automatic parallelization. See this paper at ASPLOS '14 for details: http://hips.seas.harvard.edu/content/asc-automatically-scala... |
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