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by kenz0r 4339 days ago
I don't think that is exactly true. DRAM from SDRAM up has had a number of mode registers to control the ram. More info here: http://en.wikipedia.org/wiki/Synchronous_dynamic_random-acce...
1 comments
cnvogel 4339 days ago
Exactly. ...here's the table for command accesses on DDR4, including the mode register you referred to.

http://en.wikipedia.org/wiki/DDR4_SDRAM#Command_encoding

link