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by ChuckMcM
4355 days ago
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Running through Google translate [1] gives pretty sparse press release on the Elbrus-8. Interesting bits are 'binary translation of x86' and '25 instructions at one' so a 25 instruction super scalar pipeline and dynamic instruction translation, historically has been slow as the proverbial pig on non-native code. That arose from an incredible amount of memory churn (MemOPS) when running translated code slowing the processor down to the cycle time of DRAM (110 - 130nS or about a 10Mhz effective instruction rate[2]. I get the nationalist pride in wanting to build your own system but I think they could do wonders licensing the ARM A5x cores and starting from there rather than pushing so hard down the 'everything our self' road. Just look at the success many Chinese companies have had taking the ARM path (Allwinner is probably the most familiar example). If there is someone reading who is part of this program or can advise them, I'd suggest they focus on building a 28nm FAB capability ala TSMC that they can use to make their own chips. Build a reliable semiconductor process and pipeline, and the use state money to subsidize the costs to pull foreign contracts into your FAB so that you can get a first look at people's ideas. If you are looking for strategic advantage that is a much better play than pushing out a computer architecture. [1] Possibly translated link: https://translate.google.com/translate?sl=auto&tl=en&js=y&pr... [2] For comparison this was the speed of the PC/AT 286 machine in "turbo" mode. |
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I doubt it will be fast on translated code, but Transmeta could do x86-to-VLIW translation reasonably 10 years ago, so it isn't impossible. If they have similar software, it should be quite fast. Of course, the Crusoe and Efficeon are less wide (4 and 8 functional units iirc?) but I doubt x86 is the preferred instruction set for these, it is probably there to allow mixed-mode software (x86 OS + some native applications?)
Since it seems to be built for HPC, 3 cpu-to-cpu links, 4 DDR memory controllers, over 20MB of cache. This probably makes a bit of sense, you could run a regular x86 version of Linux for most applications and support binary driver blobs etc. But then compile certain computational software as native code.
The teams behind this processor probably have built HPC stuff since the seventies[2], I doubt they would gain anything by switching direction.
[1] http://www.realworldtech.com/elbrus/ [2] http://en.wikipedia.org/wiki/Elbrus_%28computer%29