[sitkack]

I have been toying with the design of a floating point processor that has configurable precision for each operation, but I don't yet know enough about the strict needs of numerical computation.

We already do this with SP, DP, EP, bignum, arbitrary precision and algorithms that are precision tolerant so I am not sure how much of an advantage it would have.

One idea I had would be to decompile a high performance benchmark and then synthesize microbenchmarks for groups of basic blocks to get instruction packet timing for various FP operations and then model the distribution in speedups from use lower precision math.

These papers look interesting

http://isl.korea.ac.kr/paper/TVLSI_May2004.pdf

http://passat.crhc.illinois.edu/rakeshk/dsn_13_cam.pdf