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by rogerbinns
4657 days ago
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Instructions per cycle has been getting somewhat better, and it is that number multiplied by the clock speed that is a better indicator of actual performance https://en.wikipedia.org/wiki/Instructions_per_cycle Everything else needs to keep up to - it is pointless having a fast processor if it has to keep waiting on memory, storage and the network. Those are very slowly catching up and also lead to overall improved performance. I've been hoping that asynchronous implementations would take over. In theory parts of the chip can run at whatever speeds are best for them at that time, and not have to be synchronised with other parts. And when not in use they easily power down. There were some async ARM chips made, but no progress since 2000 https://en.wikipedia.org/wiki/AMULET_microprocessor |
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I sat in on a few sales calls from Intel about their new Pentium M / "Centrino" mobile architecture in 2003. What was amazing was that their performance graphs showed that Centrino had all the performance of P4, but with much lower power.
Basically, the terrible P4 microarchitecture, plus Intel's incompatible 64-bit approach (Itanium, aka "the Itanic"), left a big hole in the market where AMD stepped in and mopped up for 3-4 years with Opterons, the first 64-bit x86 processors.
Even today, x64 architecture is called "AMD64" for this reason -- AMD defined the instruction set, and Intel had to follow (for once).
IPC is undoubtedly much higher today, plus now similar machines would have 4 cores or more.