[mbell]

I wonder if it models the terrible parasitics of a real breadboard.

I imagine it would be really annoying for beginners to build an IR receiver (or whatever) with the software, have it working perfectly, then try to build it on a real breadboard only to spend hours frustratingly trying to figure out why the circuit is oscillating.

[Brashman]

Welcome to EE lab. In one lab as an undergrad, my partner and I found that we could get our circuit to work by attaching a capacitor with one end to our circuit and one end to a random place on the breadboard. It made for a bit of a funny circuit diagram in the write-up where one end of this capacitor was connected to nowhere.

[harrytuttle]

Ex EE here (RF/mixed signal). I always modelled it as everything being connected to everything via a tiny capacitor and a big resistor in parallel. This allowed a few odd scenarios to be reliably identified, especially in UHF frequencies and above.

The trailing capacitor just had a large value invisible resistor attaching it to your circuit somewhere :)

[toomuchtodo]

Is there any software out there that includes these real-world models into the design side?

[mbell]

Yes, but its usually not worth the time to include all parasitics in a model until you get to very high frequency work.

Professional circuit/PCB designers already know roughly what the issues are going to be and can order of magnitude approximate well enough to know if its worth fully modeling or not. For novices, just understanding what the parasitics are is hard enough, much less adding them to a circuit that is often already fairly complicated for them. Most lower frequency stuff that novices will be building should not have an issue with parasitics, but pushin breadboards are just awful and the most common hobbyist op amps have plenty high enough gain-bandwidth-products to bring them into play.

[compumike]

mbell is right -- rather than just adding parasitic capacitance and inductance estimates to every node, it's more helpful for the engineer to be able to evaluate and discover which nodes are particularly sensitive and which aren't. Start with some back-of-the-envelope order-of-magnitude estimates (maybe guess ~1nH/mm inductance for a wire, ~1pF capacitance between adjacent pins), and an experienced engineer will already be able to eyeball likely trouble spots in your circuit. The novice can certainly use the same concepts with simulation to do quite a bit of "debugging" in just a few minutes, for example dragging around a 1pF cap between a bunch of pins, re-running the simulation each time, and seeing where it has the most detrimental effect on an analog circuit.

[mbell]

Just to add, if you want to 'fail safe' a breadboard design, your better off assuming ~25pF of stray capacitance per breadboard insertion point. You should also make sure your circuit bandwidth is less than ~8-10Mhz, keeping in mind that if you have an opamp with GBP of 20Mhz and you're using it with a gain of 2, you may have a problem. Stray inductance can also play a part, but it's far less likely.

[fnordfnordfnord]

Umm, Spice[1]? I don't have a good model for a rusty piece of tin, but maybe someone does.

[1] Like all cheapskates, I use LTSpice.

[nanospider]

Yes, you can use something like AWR or ADS. Although they cost megabucks.

[fein]

You can always measure the capacitance between each row. Hell of a lot better than building a full circuit first, just to find out your BB sucks.

[mbell]

That usually doesn't help as a large source of the problematic parasitics is contact between the part's leads and the 'grippers' inside the breadboard. Lead diameter, corrosion, 'gripper' spring strength, etc all come into play there.

[jonmrodriguez]

So if it's so random that you can't reliably measure it because it changes every time you plug and unplug the same pin (let alone different pin diameters), how can software hope to model it?

[mbell]

When I say 'model it', I mean that loosely, perfect modeling of electronics circuits isn't realistic anyway, any modeling worth the effort will assume a range of possible values for anything under test. A simple example would be if the software warned the user that an active filter design was dangerously close to instability and thus had a decent chance of oscillating when real world parasitics are present.

[VLM]

I realize I'm posting late but its modeled the same way you model tolerances everywhere else.

There is no such thing as a 1K resistor as in 1000.000 ohms. At least not unless you pay an insane amount of money. What there is, is a random-ish spectrum of values where sorted into EIA "preferred value" bins, 10% tolerance resistors that are too high to fit in the EIA E12 bin of 820 ohms, but too low to fit in the EIA E12 bin of 1200 ohms, are by definition dropped into the EIA E12 bin for "1K" resistors.

So a lot of (good) modeling work is screwing around with placing the "wrong" value resistors, simulating, and seeing what happens. So you've got a budget constraint such that you'd like to use cheap 10% resistors. An a theoretical equation said 1063.237 ohms is just right. So you'd superficially think simulating a 1K resistor is good enough, but you really need to simulate what happens when you insert a perfect 820 or a perfect 1200... Will it explode and kill people, or merely clip and distort into a guaranteed product return and/or unhappy customer? In which case its time to start fighting with the boss to spend some extra nickles (times millions of units) to install 5% or 1% resistors. Or maybe it doesn't matter and you get to save some dough.

What makes it even more exciting is quite a few performance characteristics depend on multiple devices. You're not building a little small signal RF amp with one real world random resistor in the bias ckt and every other component is theoretically perfect. No, both your base bias resistors and collector resistor and transistor beta and everything else is "fuzzy".

There exist semi-automated tools to fuzz-n-sim for the pros... this will only confuse the heck out of the noobs so its not often discussed.

Imagine if when you wrote code, you didn't really write "if-then" and "do-while" and "for-loop" but really wrote things that are within 10% of a "do-while" almost all the time, but its never really perfect. And that's what EE work is like. Fun, eh?

[stephengillie]

Each time you virtually plug something in the program's breadboard, generate a random number. If the number is lower than a threshold, prevent the connection from working. Change the threshold at every program loading and randomly during use.

[jonmrodriguez]

Haha I assume you're joking; that would give the user zero benefit and immense pain.