|
|
|
|
|
by shameless_1
4672 days ago
|
|
Scaling to a 128 bit system is pretty hard on the layout level. On current designs, something like 95% of the surface is metal interconnects. Where there's metal you're limited in freedom to place transistors. So with 128-bit systems you're looking at 128-bit registers, address buses and data buses. Those take up a lot of real estate on the die and you can only go so far in narrowing them by using layers. 128-bit is a really really wide highway on a CPU. That doesn't mean that 128-bit systems can't be built. What it does mean is that upgrading a current 64-bit CPU to a 128-bit CPU involves sacrifices. Current-gen 64-bit systems contain a lot of optimizations in silico (branch predictors, cache predictors, ...) and control structures and that's where the problem lies: each optimization (literally) taps into that wide highway and creates dead zones on the die that contain nothing more than metal. And everywhere you tap you create zones where layering can only be applied with reduced freedom. |
|