[bigdubs]

I am a total novice when it comes to chip design; but aren't there obvious tradeoffs with any architecture? Isn't it really hard to have a silver bullet that is super powerful / wide in its processing path and efficient for power?

I would imagine that for mobile, the "insert favorite gpu metric here" per watt would be more important than the aggregate metric.

[benjamincburns]

Absolutely. I think a lot of what we're seeing here is largely the result of process reduction. That's not to say that improved design isn't at play as well, but the sub-30nm processes seem to have been a threshold for "desktop-performance" processing at size and power levels which can be truly mobile. Further, graphics processors always benefit tremendously from process reduction because they're essentially just very large arrays of very simple processors.

On the power front, smaller process means less energy needed to switch transistors. To illustrate the point, I was working with some 22nm NAND flash at my last job. In order to better understand the the characteristics of the chip's raw bit errors (errors before error correction is applied) we had a lengthy conversation with one of Micron's engineers. It turns out that in a 22nm NAND chip, the difference between a set and an unset bit is approximately the charge equivalent of 8 electrons.