[Retr0id]

Intel MEE addressed this (https://eprint.iacr.org/2016/204.pdf), by treating DRAM as entirely untrusted (assuming an attacker with arbitrary physical read/write capabilities), but then they discontinued it.

Regarding your linked comment:

> If we had properly tested and validated RAM, RowHammer wouldn't work, ever.

While it's exacerbated by physical defects and tight timings, it's really a fundamental problem with how DRAM works. It's frankly a miracle it works in the first place.

[inigyou]

No. If it was designed really well, it would trigger extra refreshes as needed. It would know how much accessing a row disturbs nearby rows and how much disturbance a row can suffer before it needs a refresh to prevent data corruption. It would know how long a row can be held open for, too. There is no fundamental theorem that rowhammer must work. It was an engineering tradeoff.

I don't think we can blame DRAM designers for flying a teensy bit too close to the sun here, since this is no problem in normal operation and only appears under adversarial scenarios. We can blame them for not fixing it once it was discovered. And we can definitely blame Intel for making ECC RAM a market segmentation feature.

[Retr0id]

What you describe is the Target Row Refresh (TRR) mitigation, and it can be bypassed via "half-double" attack.

[inigyou]

Where did I imply that they should use an incorrect underestimation of row disturbance? If they actually measured these things, they'd know how far away a disturbance can be created before it becomes so weak the normal refresh cycle fixes it.

[Retr0id]

It is not feasible for DRAM (or the memory controller) to maintain a fully accurate simulation of DRAM. If it was easy they'd have done it.

[gpm]

It doesn't need to be fully accurate, merely always conservative. It's a question of cost (how much performance does the conservative estimate waste) not feasibility.

[Dylan16807]

You don't have to simulate it that hard. If you do TRR semi-aggressively and have it give a big boost to the neighboring rows' counter you can handle further away aggressor rows.

[inigyou]

Okay then refresh the whole thing and not just a single row whenever TRR is triggered.

Or refresh the whole thing after a certain number of row activations.

Or interleave activations with refreshes. Say, after every 5 activations, refresh the next row in the refresh cycle.

I'm not a DRAM expert. They can figure it out. I promise if you refresh the whole chip after every row activation you won't have rowhammer. It'll be too slow though. Somewhere in between is the fastest point where there isn't rowhammer.

[reliabilityguy]

> Okay then refresh the whole thing and not just a single row whenever TRR is triggered.

How would you refresh the whole DRAM? Refresh is simply reading the row and writing it back, it is sequential in nature.

> Or interleave activations with refreshes. Say, after every 5 activations, refresh the next row in the refresh cycle.

It makes zero sense. Refresh is disturbance in itself. You are entering a recursion here where the mere act of refreshing increases the counter values of victim rows making refresh even more frequent. At the end you have DRAM that you cannot read from or write to at all because it’s always refreshes itself.

> I'm not a DRAM expert

Yes

[adrian_b]

This problem has never existed with bigger DRAM cells.

At some point in time, a few generations of DRAM ago, they have reduced the dimensions so much and without discovering adequate mitigations for the problems introduced by this, that the DRAM reliability has become inadequate.

The reason why they did this was to reduce the fabrication costs. It is likely that the pressure to reduce the fabrication costs has been caused more by the desire to increase the profit margins than by the intention to enable any price reductions, because even before the recent price increases there have been around 15 years with only negligible reductions in memory prices.

By increasing the fabrication costs, it would be easy to eliminate the RowHammer problem, while still having memory prices several times lower than the current prices.

However, the vendors do not want this. They want to find some kind of mitigation that would not cause any measurable increase in the fabrication costs. Until now they have failed to do this, but it is not clear how hard they have tried.

It is very likely that their failure to find anything that works has been caused in a good part by the secrecy that is typical for nowadays.

In the earlier times of the semiconductor industry, every manufacturing problem was described in public research papers, with complete details, and usually the right solution was found by someone else and then it spread quickly in all the industry, with much less concerns about "IP" than today.

Only this openness has allowed the creation of the successful semiconductor industry and of the "Silicon Valley".

[Dylan16807]

> By increasing the fabrication costs, it would be easy to eliminate the RowHammer problem, while still having memory prices several times lower than the current prices.

But current prices you mean during this huge spike? Sure, you could double fabrication costs while dropping prices a lot from today's state. But that's not impressive. That still costs more than I want.

If you could reduce the price significantly from when it was sitting at $2-3 a GB, I'd be interested, but I'd need a bunch of evidence.

[simoncion]

> If it was easy they'd have done it.

Why? Something like 70->90% of the world's DRAM is produced by three companies that are very friendly to each other. It makes no business sense to fix problems that you know your peer companies will not fix... that's spending money that you absolutely do not have to.

If the business/economic theory doesn't sway you, look way back to what happened to ISP speeds and pricing when Google Fiber so much as credibly threatened to start providing service in an area served by a mono/duo/triopoly. Or -more recently- how SpaceX demonstrated that the defense-contractor-owned space launch companies had spend decades wasting enormous amounts of taxpayer money by refusing to do any significant amount of research into bringing the cost to launch down substantially. ISPs and the space launch companies had no peers that would spend the resources required to provide a better and/or cheaper service to their customers, so it made absolutely no sense for any one of them to spend resources to break the truce and make them all far less money in the long run.

[inigyou]

Isn't this a memory controller concern, anyway?

[bell-cot]

It doesn't need to be a fully accurate simulation, any more than your car needs a fully accurate ICE simulation to decide "Change the engine oil".

Just count accesses to each row, and refresh the adjacent row(s) when some limit is reached.

[inigyou]

Half-Double is an attack where you hammer the rows 2 spaces away so that the automatic refresh on the rows 1 space away is what actually hammers the target row.

[anon_rh_guy]

Little known fun fact: the MEE's checksum updates... were one of the most successful Rowhammer patterns... :-p

[Retr0id]

Interesting - but presumably used to attack rows outside of SGX?

[anon_rh_guy]

both, inside and outside