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by 15155
6 days ago
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> so I put it between the port and the magnetics For GP: this is something you would learn from a PHY manufacturer's EVK schematics and layouts. TI (especially), NXP, Microchip show correct magnetics/ESD part numbers and placement - the trickier thing here is finding an EVK that doesn't just use an integrated MagJack. See https://www.ti.com/lit/df/snlr034/snlr034.pdf |
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I chose an Intel N100 SoM and there's an example carrier board, but the whole point of my project is to customize that board. I wanted to do things like rewire the HSIO lines: turn the GPU PCIe socket into extra USB 3.0 ports and M.2 E sockets. The "known good" designs won't port over cleanly. It's PCIe gen3 over short runs, Claude tells me it's "forgiving" but I'm still nervous about it.
I'm placing an Intel I210-IT onto this board too, would definitely appreciate any tips!!