[modulovalue]

I'm working on making SIMD better in Dart. Dart supports RISC-V as a target architecture for compilation, but I'm not really excited about figuring out how to map the wasm-SIMD-style primitives to RISC-V's RVV and so I don't really plan to look into it at all.

This is mostly because their approach to SIMD is so different, but also because I can't test it at all. Are there any RISC-V "machines"? that one can use to do something useful or fun with that someone here could recommend?

I guess it would be fun seeing all my SIMD-fiable use-cases become orders of magnitude faster on RISC-V, too, but I sadly never hear anything about machines that use RISC-V.

[camel-cdr]

> Dart supports RISC-V as a target architecture for compilation, but I'm not really excited about figuring out how to map the wasm-SIMD-style primitives to RISC-V's RVV and so I don't really plan to look into it at all.

On the one hand, this will be quite straight forward, but on the other hand quite disappointing.

Afaik Dart has a 128-bit only SIMD abstraction (so not performance portable by default). Since the base "V" extension mandates a mininum vector length of 128-bit, you can trivially make codegen work for all vector length, by simply setting vl to 128/elementwidth.

But as with x86, if your native hardware vector length is larger than 128-bit, you leave performance on the table.

> This is mostly because their approach to SIMD is so different, but also because I can't test it at all. Are there any RISC-V "machines"?

I'd recommend using qemu for initial testing.

Hardware wise, the cheapest option is the orange pi rv2, which has 8 SpacemiT X60 cores, which are in-order and support 256-bit RVV. The Zhihe A210 is also interesting, but way to expensive for what it is.

If you have a higher budget, I'd recommend the SpacemiT K3, which is the fist RISC-V SBC with RVA23 support. It is has 8 SpacemiT X100 4-wide out-of-order cores, with 256-bit RVV.

[seastarer]

You can try to re-vectorize the code for larger vector size.

[diamondlovesyou]

Not if you can't prove anti-aliasing properties, which wasm doesn't carry.

[Someone]

I don’t think the OP is starting from WASM code; they’re starting from a language with SIMD primitives that map closely to those of WASM. There, you often have information to prove function arguments do not alias.

[aarroyoc]

There are several RISC-V machines. In the microcontroller world it's becoming more and more usual, but those won't have RVV. SpacemiT K3 based machines are probably your best bet when it comes to RISC-V processors with SIMD support. There are several manufacturers: Milk-V with the Jupiter II, Sipeed, Banana Pi, ...

[brucehoult]

The THead C906 core is full Linux-capable but is microcontroller-adjacent and has an early draft version of RVV that is different in details but has the same flavour (and at least some code is binary-compatible with RVV 1.0). Recent GCCs RVV intrinsics compile to either RVV 1.0 or the 0.7 draft (named XTHeadVector now) so if you're programming at that level they're compatible. Milk-V Duo starts at $3 for a tiny board with a 1.0 GHz C906 running Linux, a 700 MHz microcontroller config C906 (no MMU etc), and 64 MB RAM. Well, I paid $3 ... then they were $5 for several years and now I see $11 at arace.tech. There are also 256MB and 512MB versions, with the larger one also having an Arm A53 core.

That's actually got full 128 bit SIMD with all data types supported up to 64 bit int and FP.

You can also buy bare CV1800B and SG200x chips (Sophgo bought original designer Cvitek and enhanced the design)

[pdpi]

You can buy a RISC-V mainboard for the Framework Laptop, and it's relatively cheap (£170)

https://frame.work/gb/en/products/deep-computing-risc-v-main...

[camel-cdr]

No don't buy this one, it doesn't support RVV. Their newer ones do, but those are a lot more expensive.

[pdpi]

Good catch, thanks.

[aa-jv]

OrangePi RV2 might qualify for fun?

https://www.phoronix.com/news/Ubuntu-Linux-On-OrangePi-RV2

[IshKebab]

There are various emulators available that support RVV but they aren't going to be especially useful for benchmarking/profiling.

So you can write code that works, but it's probably a few more years still until high performance RISC-V cores are easily available for profiling RVV code and finding the best code.

Progress is steady though - it will happen soon. It's not one of those "year of desktop Linux" things.

[snvzz]

>Are there any RISC-V "machines"? that one can use to do something useful or fun with that someone here could recommend?

Multiple boards based on the RVA23 spacemiT K3 are shipping as of recently.

They are usefully performant. Comfortable webbrowsing and playing 4K youtube without issues sort of fast.

[ykonstant]

>This is mostly because their approach to SIMD is so different, but also because I can't test it at all. Are there any RISC-V "machines"? that one can use to do something useful or fun with that someone here could recommend?

I would also be interested in RISC-V emulators etc.

[brucehoult]

QEMU. Docker, using QEMU under the hood, there automatically with Docker Desktop on Mac & Windows, install QEMU yourself on Linux and configure binfmt_misc to use it.

[ykonstant]

I forgot to thank you, I didn't know qemu supported risc-v arch! I am already using it for various vms.