[delusional]

Hey, I made one of these too[1]. One of the cool things about my implementation is that the sample loop is carefully written in cycle counted assembly to sample the ADC of the teensy 2.0 at the absolute maximum frequency. I like your blogpost a lot more than mine though.

[1] Github: https://github.com/DelusionalLogic/Frametime, Blogpost: https://www.jnsn.dev/posts/frametime/, and followup: https://www.jnsn.dev/posts/fastisslow/

[hoechst]

That's awesome, odd that I did not come across your project when i was researching this. I'll make sure to read your posts and source code.